Advanced Techniques in VLSI Design for Low Power Consumption

Authors

  • Kai Scott PhD
  • Taylor Thomas Dr.
  • Quinn Thompson Prof.

Keywords:

VLSI Design, Low Power, Energy Efficiency, Integrated Circuits, Dynamic Voltage Scaling

Abstract

This article explores advanced techniques in Very Large Scale Integration (VLSI) design aimed at reducing power consumption. The focus is on novel methods that optimize energy efficiency without compromising performance. Through simulations and experimental results, the study demonstrates significant energy savings in integrated circuits. These advancements are crucial for the development of sustainable electronic systems, especially in portable and wireless devices.

Author Biographies

Kai Scott, PhD

PhD
Technical University of Munich
Arcisstr. 21, 80333 Munich, Germany

Taylor Thomas, Dr.

Dr.
University of Tokyo
7 Chome-3-1 Hongo, Bunkyo City, Tokyo 113-8654, Japan

Quinn Thompson, Prof.

Prof.
Massachusetts Institute of Technology
77 Massachusetts Ave, Cambridge, MA 02139, USA

References

Kumar, N., & Kataria, V. Enhanced Sentiment Classification using a Multi-layered Stacked Ensemble Architecture.

Рагимов, Э. (2011). КВАЛИМЕТРИЧЕСКИЕ ПОКАЗАТЕЛИ БЕЗОПАСНОСТИ ПРОГРАММНЫХ КОМПЛЕКСОВ, РЕАЛИЗУЮЩИХ СИСТЕМУ УПРАВЛЕНИЯ КОРПОРАТИВНЫМИ СЕТЯМИ. Problems of information technology, 2(1), 18-23.

Рагимов, Э. Р. О. (2011). Метрология элементов безопасности программных комплексов, реализующих систему защиты информации корпоративных сетей. Вопросы защиты информации, (2), 36-41.

Published

2024-12-24

Issue

Section

Articles